Non-contact IC cards, also known as RF cards, are a new technology developed in the world in recent years. It uses wireless communication technology for contactless two-way communication to achieve the purpose of identifying and exchanging data, and solves the problem of passive (no power in the card) and contactless. This paper presents a design of RF receiving circuit based on ISO/IEC 14443 standard B type non-contact IC card. The scheme satisfies the performance requirements of correlation by using a simpler circuit form and a software demodulation method. Since there is no need to use a dedicated ASIC for demodulation and decoding, the cost is low.
1 The basic composition of the non-contact IC card system
The contactless IC card system consists of a reader/writer and an IC card, which is itself a passive card. When the reader reads and writes the card, the reader sends a set of electromagnetic waves of fixed frequency to the IC card. The signal sent by the reader is composed of two parts: one part is the power signal, and the signal is received by the card. The internal circuit processing is used as a power supply to provide operating voltage for other circuits; the other part is an instruction and data signal, which commands the chip to complete data reading, modification and storage, and returns a signal to the reader.
The reader is divided into two channels, transmitting and receiving, with the microcontroller as the core. The transmission channel is composed of an oscillator, a power amplifier, a tuning circuit, an encoder and a modulator; the receiving channel is composed of a filter amplifier, a demodulation circuit and a decoder. Transceiver data is processed by the microcontroller and can communicate with the host.
2 ISO14443 TYPE B
The industry standard ISO14443 for contactless smart cards refers to IC cards as PICC cards and readers as PCDs. This standard specifies two communication transmission modes, TYPEA and TYPEB, between PICC and PCD. Regardless of the A or B type, the carrier frequency is 13.56MHz, the subcarrier frequency is 847kHz, and the communication baud rate between the RF card and the reader is 106Kbps. When the Type B reader/writer transmits a signal to the card, the encoding mode is asynchronous, NRZ encoding, and adopts 10% ASK modulation mode; when the card transmits signals to the reader/writer, BPSK encoding is used for modulation.
3 receiving solution design
The block diagram of the non-contact IC card receiving circuit of this design is shown in Fig. 1. The circuit is powered by a 5V power supply, and the RF signal returned by the card is amplified, demodulated and decoded. The amplifier section uses the FET BFT 46. The decoding is done in the PIC16F877 microcontroller and connected to the computer via RS-232.
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The PIC16F877 microcontroller is selected as the microprocessor for this receive channel. PIC series MCUs use a reduced instruction set computer RISC and Harvard dual bus and a two-stage instruction pipeline structure, featuring high speed, low operating voltage, low power consumption and excellent cost performance. The PIC16F877 has 8KB of Flash and 256B of E2PROM, which is sufficient for the program. Its operating frequency is 13.56MHz.
3.1 Communication circuit
The PIC microcontroller communicates with the computer via the synchronous/asynchronous transceiver USART and performs level shifting via a standard RS-232 serial interface. The RS-232 communication circuit is shown in Figure 2. RS-232 uses negative logic, that is, logic "1": -5 ~ -15V; logic "0": +5 ~ +15V. The CMOS level is logic "1": 4.99V; logic "0": 0.01V. The TTL level is logic "1": 24V; logic "0": 0.4V. Therefore, when using the RS-232 bus for serial communication, an external circuit is required to achieve level conversion. The driver uses the driver to convert the TTL or CMOS level to the RS-232C level, and the receiver uses the receiver to RS-232C. The level is converted to TTL or CMOS level. Here MAXMAX's MAX202E is used for level shifting. MAX202E belongs to MAXIM's universal serial receiving/transmitting driver chip. Its peripheral circuit is simple. It only needs to connect two 1μF capacitors. The baud rate is set to 9 600bps. The program realizes the asynchronous receiving and transmitting function of the single-chip microcomputer.
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3.2 Amplified phase-locked circuit
After the antenna receives the signal, the detection process is performed, and the detection circuit realizes envelope detection, and filters the 13.56 MHz carrier to obtain a 847 kHz subcarrier modulation signal. The tuned amplifying circuit provides selective amplification of the desired signal, while providing a degree of filtering of the undesired signal, making the signal cleaner and facilitating software phase locking. After tuning and amplification processing, a sine and cosine signal carrying digital information is obtained, as shown in FIG. The detector diode uses a high-speed Schottky diode BAS70, and the op amp uses a FET BFT 46.
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The MCU software realizes the processing of bit synchronization. The idea is that the corresponding clock signal is generated by the MCU timer, and the clock signal is corrected by the received signal to make it coincide with the phase of the received signal. In fact, the start timing of the local carrier output signal is adjusted according to the timing of the positive and negative edges of the data signal. The signal is detected by the microcontroller pin and then enters the interrupt processing, while the other pin outputs three sets of test signals with a continuous phase increment of 90°. The software phase-locked front-end circuit diagram is shown in Figure 4. The test signal is applied to the FET. Figure 5 shows a case of interrupt signal processing: channel 1 is the original signal, channel 2 is the test signal, and the first test signal falls in the 0-90° phase region of the original signal, so it does not function until the third test signal. One pulse is obtained from the original signal, as shown by channel 3 in FIG.
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Different results are sent to the MCU for processing, and the phase difference between the test signal and the original signal can be obtained. After the corresponding processing, the output phase lock is output, and the output pin is set to the PWM mode, and the output of the FET is controlled to obtain a modulated signal. The BPSK signal before and after the demodulated symbol alternate moment is shown in Fig. 6. The continuous 8 pulses represent the data bit0, and if there is no pulse in this time, the data bit1 is represented.
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3.3 Software decoding
Signal decoding is done in C language programming using the picmate 2002 compiler. The data transmission rate is 106 Kbps. Because the MCU adopts the normal interrupt timing method, the correct decoding purpose cannot be achieved. Therefore, the main design idea of ​​the program is: read the sync header and read the port, set the counter T0 to 4 pulse triggers, and disable the interrupt, accurately calculate each C statement after assembly. The occupied clock cycle, while paying attention to the while statement, timely increase or decrease the number of readings at the beginning and end of the cycle, so that each operation is completed within 8 pulses. At this time, the T0IF flag is read. If the bit is set to 0, the T0IF flag is cleared to 0, and the next step is continued until the reading of the 1-frame signal is completed. The block diagram is shown in Figure 7.
4 Conclusion
This article describes the design of the RFID receiver module. The module does not use a dedicated ASIC to achieve signal encoding and decoding. The encoding and decoding work is basically done by software, which effectively solves the BPSK signal phase ambiguity problem. The hardware and software debugging of this module has been completed.
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